cy2xf32 high performance cmos oscillator with frequency margining ? pin control cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 001-53147 rev. *d revised may 6, 2011 features crystal oscillator with cmos output output frequency from 8 mhz to 200 mhz two frequency margining control pins (fs0, fs1) output enable or power-down function factory configured or field programmable integrated phase-locked loop (pll) supply voltage: 3.3 v or 2.5 v pb-free package: 5.0 3.2 mm lcc commercial and industrial temperature ranges functional description the cy2xf32 is a high performance and high frequency crystal oscillator (xo). it uses a cypress proprietary low noise pll to synthesize the frequency from an in tegrated crystal. the output frequency can be changed via two select pins, allowing easy frequency margin testing in applications. the cy2xf32 is available as a fa ctory configured device or as a field programmable device. logic block diagram frequency select decode output divider 4 clk crystal oscillator low -noise pll 2 fs1 5 fs0 1 oe /p d# [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 2 of 10 pinouts figure 1. pin diagram ? 6 pin ceramic lcc functional description the fs0 and fs1 pins select between four different output frequencies, as shown in ta b l e 2 . frequency margining is a common application for this feature. one frequency is used for the standard operating mode of the device, while the other frequencies are available for margin testing, either during product development or in system manufacturing test. when changing the output frequency, the frequency transition is not guaranteed to be smooth. there can be frequency excur- sions beyond the start frequency and the new frequency. glitches and runt pulses are possible, and time must be allowed for the pll to relock. pin 1 is programmed to function as either oe (output enable) or pd# (power-down, active low). the oe function is used to enable or disable the clk output very quickly, but it does not reduce core power consumption. the pd# function puts the device into a low power state, but the wake up takes longer because the pll must reacquire lock. details are shown in ta b l e 3 and ta b l e 4 . 1 3 oe/pd# vss vdd clk 6 4 2 5fs0 fs1 table 1. pin definiti ons ? 6-pin ceramic lcc pin name i/o type description 1 oe/pd# cmos input output enable or power-down : functionality is a programming option; see ta b l e 3 and table 4 for details. 2, 5 fs1, fs0 cmos input frequency select. 4 clk cmos output clock output. 6 vdd power supply voltage: 2.5 v or 3.3 v. 3 vss power ground. table 2. frequency select fs1 fs0 output frequency 0 0 frequency 0 0 1 frequency 1 1 0 frequency 2 1 1 frequency 3 table 3. output enable operation oe pll & xtal oscillator output buffer 0active off 1 active on table 4. power-down operation pd# pll & xtal oscillator output buffer 0off off 1 active on [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 3 of 10 programming description the cy2xf32 is a programmable device. before being used in an application, it must be programmed with the output frequencies and other variables described in a later section. two different device types are available, each with its own programming flow. they are described below. field programmable cy2xf32f field programmable devices are shipped unprogrammed and must be programmed before being installed on a printed circuit board (pcb). customers use cyberclocks? online software to specify the device configur ation and generate a jedec (extension .jed) programming file. programming of samples and prototype quantities is available using a cypress programmer. third party vendors manufacture programmers for small to large volume applications. cypress?s value added distribution partners also provide programming services. field programmable devices are designated with an ?f? in the part number. they are intended for quick prototyping and inventory reduction. the cy2xf32 is one time programmable (otp). the software is located at www.cyberclocksonline.com. factory configured cy2xf32 for ready-to-use devices, the cy2xf32 is available with no field programming required. all requests are submitted to the local cypress field application engineer (fae) or sales represen- tative. after the request is processed, the user receives a new part number, samples, and data sheet with the programmed values. this part number is used for additional sample requests and production orders. programming variables output frequencies the cy2xf32 is programmed with up to four independent output frequencies, which are then selected using the fs0 and fs1 pins. the device can synthesize frequencies to a resolution of one part per million (ppm), but t he actual accuracy of the output frequency is limited by the accuracy of the integrated reference crystal. pin 1: output enable or power-down (oe/pd#) pin 1 is programmed as either output enable (oe) or power-down (pd#). supply voltage a programming option optimizes the cy2xf32 for either 2.5 v or 3.3 v supply voltage. a device programmed for a particular supply voltage is not guaranteed to meet specifications when operated at the other voltage. industrial versus commerc ial device performance industrial and commercial devices have different internal crystals. this has a potentially significant impact on performance levels for applications requiring the lowest possible phase noise. cyberclocks online software displays expected performance for both options. table 5. device programming variables variable output frequency 0 (power on default) output frequency 1 output frequency 2 output frequency 3 pin 1 functionality (oe or pd#) supply voltage (2.5 v or 3.3 v) temperature range (commercial or industrial) [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 4 of 10 absolute maximum conditions parameter description condition min max unit v dd supply voltage ?0.5 4.4 v v in [1] input voltage, dc relative to v ss ?0.5 v dd +0.5 v t s temperature, storage non operating ?55 135 c t j temperature, junction ?40 135 c esd hbm esd protection (human body model) jedec std 22-a114-b 2000 ? v ja [2] thermal resistance, junction to ambient 0 m/s airflow 64 c/w operating conditions parameter description min typ max unit v dd 3.3 v supply voltage range 3.135 3.3 3.465 v 2.5 v supply voltage range 2.375 2.5 2.625 v t pu power-up time for v dd to reach minimum specified voltage (power ramp is monotonic) 0.05 ? 500 ms t a ambient temperature, commercial 0 ? 70 c ambient temperature, industrial ?40 ? 85 c c load load capacitance at clk (>100 mhz) ? ? 10 pf load capacitance at clk ( 100 mhz) ? ? 15 pf notes 1. the voltage on any input or i/o pin cannot exceed the power pin during power-up. 2. simulated. the board is derived from the jedec multilayer standard. it measures 76 x 114 x 1.6 mm and has four layers of copp er (2/1/1/2 oz.). the internal layers are 100% copper planes, while the top and bottom layers have 50% metalization. no vias are included in the model. 3. not 100% tested, guaranteed by design and characterization. dc electrical characteristics parameter description condition min typ max unit i dd operating supply current v dd = 3.465 v, oe/pd# = v dd , output unloaded ??110ma i sb standby supply current pd# = v ss ? ? 200 a v oh output high voltage v dd = min, i oh = ?4 ma 0.9 v dd ?? v v ol output low voltage v dd = max, i ol = 4 ma ? ? 0.1 v dd v i oz output leakage current oe/pd# = v ss ?35 ? 35 a v ih input high voltage 0.7 v dd ?? v v il input low voltage ? ? 0.3 v dd v i ih0 input high current, oe/pd# pin input = v dd ??115 a i ih1 input high current, fs0 & fs1 pins input = v dd ??10 a i il0 input low current, oe/pd# pin input = v ss ?50 ? ? a i il1 input low current, fs0 & fs1 pin input = v ss ?20 ? ? a c in0 [3] input capacitance, oe/pd# pin ? 15 ? pf c in1 [3] input capacitance, fs0 & fs1 pin ? 4 ? pf [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 5 of 10 ac electrical characteristics [3] parameter description condition min typ max unit f out output frequency [5] 8?200mhz fsc frequency stability, commercial devices [4] t a = 0 c to 70 c ? ? 35 ppm fsi frequency stability, industrial devices [4] t a = ?40c to 85c ? ? 55 ppm ag aging, 10 years ? ? 15 ppm t dc output duty cycle measured at v dd /2; see figure 2 45 50 55 % t r output rise time 20% to 80% of v dd , c load = 15 pf ? 0.7 1.5 ns t f output fall time 80% to 20% of v dd , c load = 15 pf ? 0.8 1.5 ns t ohz output disable time time from falling edge on oe to stopped outputs (asynchronous) ??100ns t oe output enable time time from rising edge on oe to outputs at a valid frequency (asynchronous) ??100ns t lock startup time time for clk to reach valid frequency measured from the time v dd = v dd (min.) or from pd# rising edge ??5ms t lfs relock time time for clk to reach valid frequency from fs0 or fs1 pin change ??1ms notes 4. frequency stability is the maximum variation in frequency from f 0 . it includes initial accuracy, plus variation from temperature and supply voltage. 5. this parameter is specified in cyberclocks online software. [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 6 of 10 switching waveforms figure 2. duty cycle timing figure 3. output rise and fall time figure 4. output enable and disable timing clk t pw t period t dc = t pw t period clk 20% 80% t r t f 20% 80% v dd 0v oe clk high impedance t oh z t oe v il v ih [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 7 of 10 ordering information the following table contains only the parts that are currently av ailable. if you do not see what you are looking for, contact y our local sales representative. for more informa tion, visit the cypress website at www.cypress.com and refer to the product summary page at http://www.cypre ss.com/products . some product offerings are factory programmed customer sp ecific devices with customized part numbers. the possible configurations table shows the available dev ice types, but not complete part numbers. contact your local cypress fae of sales representative for more information. possible configurations ordering code definitions part number [6] configuration package description product flow pb-free cy2xf32flxct field programmable 6-pin ceramic lc c smd ? tape and reel commercial, 0 to 70c CY2XF32FLXIT field programmable 6-pin ceramic lc c smd ? tape and reel industrial, ?40 to 85c part number [6] configuration package description product flow pb-free cy2xf32lxcxxxt factory configured 6-pin ceramic lc c smd ? tape and reel commercial, 0 to 70c cy2xf32lxixxxt factory configured 6-pin ceramic lc c smd ? tape and reel industrial, ?40 to 85c t = tape and reel customer specific code temperature range : c = commercial, i = industrial pb-free package type part identifier family company id: cy = cypress xx cy xxx t l x xxx x note 6. ?xxx? is a factory assigned code that identifies the programming option. [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 8 of 10 package diagram figure 5. 6-pin 3.2 5.0 mm ceramic lcc 001-10044 *a [+] feedback
cy2xf32 document number: 001-53147 rev. *d page 9 of 10 acronyms document conventions units of measures acronym description clkout clock output cmos complementary metal oxide semiconductor dpm die pick map eprom erasable programmab le read only memory lvds low-voltage differential signaling ntsc national televi sion system committee oe output enable pal phase alternate line pd power-down pll phase locked loop ppm parts per million ttl transistor transistor logic symbol unit of measure c degrees celsius khz kilohertz k kilohms mhz megahertz m megaohms a microamperes s microseconds v microvolts vrms microvolts root-mean-square ma milliamperes mm millimeters ms milliseconds mv millivolts na nanoamperes ns nanoseconds nv nanovolts ohms [+] feedback
document number: 001-53147 rev. *d revised may 6, 2011 page 10 of 10 all products and company names mentioned in this document may be the trademarks of their respective holders. cy2xf32 ? cypress semiconductor corporation, 2009-2011. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement wi th cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. . sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products automotive cypress.co m/go/automotive clocks & buffers cypress.com/go/clocks interface cypress. com/go/interface lighting & power control cypress.com/go/powerpsoc cypress.com/go/plc memory cypress.com/go/memory optical & image sensing cypress.com/go/image psoc cypress.com/go/psoc touch sensing cyp ress.com/go/touch usb controllers cypress.com/go/usb wireless/rf cypress.com/go/wireless psoc solutions psoc.cypress.com/solutions psoc 1 | psoc 3 | psoc 5 document history page document title: cy2xf32 high performance cmos oscillator with frequency margining ? pin control document number: 001-53147 revision ecn submission date orig. of change description of change ** 2705753 05/13/09 kvm/pyrs new data sheet *a 2734005 07/09/2009 wwz post to external web *b 2764787 09/19/2009 kvm change i sb max from 250 a to 200 a add max limit for t r , t f : 1.5 ns change t lock max from 10 ms to 5 ms change t lfs max from 10 ms to 1 ms *c 2958629 06/22/10 kvm updated ordering information and package diagram. *d 3169028 05/06/10 bash changed status from preliminary to final. added acronyms, units and ordering code definitions. updated template as per current cypress standards. [+] feedback
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